Steering Committee

• Dr.G.Viswanathan, Chancellor, VIT (Patron)
• Mr. Sankar Viswanathan, Vice-President, VIT (Co-Patron)
• Dr. Sekar Viswanathan, Vice-President, VIT (Co-Patron)
• Mr. G.V.Selvam , Vice- President, VIT (Co-Patron)
• Dr. Rambabu Kodali, Vice-Chancellor, VIT (Co-Patron)
• Dr.S.Narayanan, Pro Vice-Chancellor, VIT (Co-Patron)

Technical Program Committee

• Dr. Roy Paily, Indian Institute of Technology, Guwahati, India
• Dr. Navin Bishnoi, Marvel Semiconductors, Bengaluru, India
• Dr. Maryam Shojaei Baghini, Indian Institute of Technology, Bombay, India
• Dr. P.Sakthivel, Anna University, Chennai, India
• Dr. G.Lakshminarayanan, National Institute of Technology, Trichy, India
• Dr. Vanathi P T, PSG College of Technology,Coimbatore,India
• Dr. Venkata Vanukuru, Global Foundries, Bengaluru, India
• Dr. Jawahar Senthilkumar V, Anna University, Chennai, India
• Mr. Gaurav Goel, Intel, Bangalore
• Mr. Jayaraman K,Maxim Integrated, Bangalore
• Mr. Lavakumar A, Synopsys, Bangalore
• Dr. Meganathan D, Anna University, Chennai, India
• Dr. Moorthi S, NIT, Trichy, India
• Dr. Nirmal kumar P, Anna University, Chennai, India
• Mr. Pradeep Nair,Texas Instruments, India, Bangalore
• Dr. N. Balamurugan , Thiagarajar College of Engineering, Madurai, India
• Dr. C.P.Ravikumar, Texas Instruments, Bengaluru
• Dr. Vipin Madangarli, Global Foundries, Bengaluru,India
• Dr. G. Seetharaman, National Institute of Technology, Nagaland,India
• Dr. Susmita Sur-Kolay, ACM Unit, Indian Statistical Institute, India
• Dr. M. Sabarimalai Manikandan, IIT, Bhuvaneshwar ,India
• Dr. Vaidy Subramanian, Deputy Director, Design Enablement GLOBAL FOUNDRIES, India
• Dr.Jay Shah, Global Fab Engineering Services (GFES) BLR GLOBAL FOUNDRIES, India

Organizing Committee

General Chair

• Dr. S.Sivanantham Dean, SENSE

Organising Chairs

• Dr. V.Arunachalam Dept. of Micro and Nano Electronics, SENSE
• Dr. K.Sivasankaran Dept. of Micro and Nano Electronics, SENSE

Publication Chair

• Dr. S. Kumaravel Head, Dept. of Micro and Nano Electronics, SENSE

Technical Session Chairs

• Dr. Sakthivel R Dept. of Micro and Nano Electronics, SENSE
• Dr. Rajan Kumar Pandey Dept. of Micro and Nano Electronics, SENSE
• Dr. Jagannadha Naidu K Dept. of Micro and Nano Electronics, SENSE

Tutorial Chair

• Dr. Rajeev Pankaj Nelapati Dept. of Micro and Nano Electronics, SENSE

Technical Review Chair

• Dr. V. Nitish Kumar Dept. of Micro and Nano Electronics, SENSE

Registration Chairs

• Dr. Sri Abibhatla Sridevi Dept. of Micro and Nano Electronics, SENSE
• Dr. V. N. Ramakrishnan Dept. of Micro and Nano Electronics, SENSE
• Prof. M Aarthy Dept. of Micro and Nano Electronics, SENSE

Finance Chair

• Prof. P. Jayakrishnan Dept. of Micro and Nano Electronics, SENSE

Website Chair

• Prof. C Prayline Rajabai Dept. of Micro and Nano Electronics, SENSE

Hospitality Chairs

• Dr. T. Pradeep Dept. of Micro and Nano Electronics, SENSE
• Dr. Antony Glittas Dept. of Micro and Nano Electronics, SENSE
• Prof. G. Raghunath Dept. of Micro and Nano Electronics, SENSE

Publicity Chairs

• Prof. S Ravi Dept. of Micro and Nano Electronics, SENSE
• Prof. R Dhanabal Dept. of Micro and Nano Electronics, SENSE

Sponsorship Chairs

• Prof. Rajeev Pankaj N Dept. of Micro and Nano Electronics, SENSE
• Prof. Satheesh Kumar S Dept. of Micro and Nano Electronics, SENSE

The authors are invited to submit full-length original research contributions and review articles which are NOT Published / Submitted / Under consideration anywhere in other journals/magazines or conference proceedings.

All submitted papers will undergo a rigorous peer-review process and authors of selected papers will be invited to present their work at ICMDCS 2022, after registration.

Since the proceedings of our conference is post-conference proceedings, the papers presented in the conference will thoroughly undergo the format, and plagiarism checks by the Springer CCIS publications team and the final decision on your presented paper will be based on the approval from publishers.

The conference will bring together leading researchers, engineers and scientists in the domain of interest from around the world.

Topics of interest for submission include, but are not limited to:

System-level Design: (Track-1)

System-level design methodologies, processor and memory design, multicore systems, GPU design, on-chip communication architectures and networks-on-chip, performance analysis, defect-tolerant architectures, machine learning): Hardware/Software co-design, embedded SoC, embedded multi-core systems, board-level hardware, hardware platforms for Internet-of-Things (IoT) devices, Reconfigurable computing, FPGA architecture and FPGA circuit design, CAD for FPGA, FPGA prototyping, FPGA-based accelerators for cloud servers, Wireless sensor networks, low-power wireless systems, wireless protocols, wireless power delivery.

Digital Design (Track-2)

Logic and physical synthesis, physical design, timing and signal integrity, power integrity, design for manufacturability, design for yield, design challenges for advanced technology nodes, low-power design, power-aware and energy-efficient design, thermal management, battery-aware design, energy harvesting, CAD Tools, Verification methodologies, DFT, fault modelling and simulation, ATPG, BIST, board-level and system-level test, memory test.

Analog, Mixed-Signal and RF Design: (Track-3)

Design of analog, mixed-signal, and RF IP, high-speed wired and wireless communication interfaces, low-power analog and RF, memory design, and standard cell design.

Emerging Technologies: (Track-4)

MEMS, CMOS sensors, design methodologies for nanotechnology, post-CMOS devices, biomedical circuits, carbon nanotube-based computing, spintronics, silicon photonics, neuromorphic computing. Advanced Logic and Memory devices, Flexible and Organic Electronics, Photovoltaics and Energy Systems, Nano-electro-mechanical Systems and Sensors, Optoelectronics and Photonics, Compound Semiconductor Devices, Computational Modeling at the Nanoscale, Semiconductor Materials and Processes, Emerging Materials and Devices, Device Reliability.