The program is intended for the Faculty, UG and PG students, research scholars, practicing engineers and people from R & D in the field of VLSI Design. The main objective of the program is to provide the concepts Design for Testing, Scan based Testing, Scan Compression, Test Standards, Memory Testing, Test Diagnosis, Advanced Fault Modeling and Hands on sessions using Tessent DFT Tools from Siemens EDA (Mentor) tools. You will earn a digital bagde from Siemens EDA on successful completion of this program.