Events

Value Added CourseonVAC2336 RTL to GDSII (SYSTEM ON A CHIP DESIGN)
19-01-2025

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09-03-2025

With today's increasingly large and complex digital IC and system-on-chip (SoC) designs, design power closure, circuit power integrity and Testing become one of the main engineering challenges, thereby impacting the device's total time-to-market. This Training will teach you how to implement a design from RTL-to-GDSII using various industry standard tools. You will start by coding a design in Verilog, simulate, synthesize and optimize for a better design.

A Value-Added Programme On dSpace1104 Based Hardware in Loop (HIL) for Power Electronic Converter
Value Added CourseYoga for Youth Empowerment
One-Day Skill Development, CapacityBuilding and Competency EnhancementWorkshop on Introduction to Clinical DataManagement(CDM) and Career Pathways
Online Workshop Hands-on Robotic Automation with ROS: From Basics to Applications

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