Events

Value Added CourseonVAC2336 RTL to GDSII (SYSTEM ON A CHIP DESIGN)
19-01-2025

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09-03-2025

With today's increasingly large and complex digital IC and system-on-chip (SoC) designs, design power closure, circuit power integrity and Testing become one of the main engineering challenges, thereby impacting the device's total time-to-market. This Training will teach you how to implement a design from RTL-to-GDSII using various industry standard tools. You will start by coding a design in Verilog, simulate, synthesize and optimize for a better design.

One Day Online Workshop on Large Language Model in Generative AI with Research and Industry Applications
Industry-Academia Conclave (IAC) 2025 – Electronics Renaissance : Accelerating Indian Leadership for Global Sustainability
Data Driven Futures: An innovationin Data Science, AI/ML,Bioinformatics and Computing
Design and Debug of Embedded Systems

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