One Day workshop on ASIC Design Using Cadence Tools - Vellore Institute of Technology

Events

One Day workshop on ASIC Design Using Cadence Tools

01-11-2025

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01-11-2025

One Day workshop on ASIC Design Using Cadence Tools

SENSE

Vellore Institute of Technology, Vellore

Registration Link

Registration Link

The Value-Added Lecture on ASIC Design aims to introduce students to the most in-demand skills in the field of ASIC design. The course covers both the fundamental concepts and practical hands-on training required in ASIC development. Students will gain experience across the complete design flow — from RTL to Netlist generation — including timing design using Tempus and DFT implementation using the Modus tool. This comprehensive training enables students to efficiently manage design projects and build a strong foundation for a career as an ASIC Design Engineer.

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