Events

  • Home
  • All Events
  • Digital Hardware Architecture Design: Verilog, Pipeline Processors and FPGA Implementation
Digital Hardware Architecture Design: Verilog, Pipeline Processors and FPGA Implementation
16-06-2025

-

26-06-2025
 VIT-SENSE
 Vellore Institute of Technology, Vellore
Register For event
Registration Link
Registration Link
❖ E-Certificates will be provided to participants
❖ No TA/DA/Accommodation will be provided
❖ For more details, please contact the organizers
Upcoming Events Past Events
SustainAI 2026 – Industry–Academia Conclave 2.0
SustainAI 2026 – Industry–Academia Conclave 2.0
Start Date: 06-10-2026
One Day Workshop on Generative AI: Building RAG-Based AI Applications and Intelligent AI Agents
One Day Workshop on Generative AI: Building RAG-Based AI Applications and Intelligent AI Agents
Start Date: 17-09-2026
One day online Workshop on AI-Powered IoT Cybersecurity: Threats, Vulnerability Assessment & Intelligent Mitigation
One day online Workshop on AI-Powered IoT Cybersecurity: Threats, Vulnerability Assessment & Intelligent Mitigation
Start Date: 17-10-2026
Muthamizh vizha
Muthamizh vizha
Start Date: 23-09-2026

Beware of VITEEE fake websites

We came to know that some fake websites are misusing our VITEEE name. Kindly be aware of fraud websites. Please visit only https://vit.ac.in for admissions.

  • Announcements

Research

Undergraduate NRI / Foreign Admission

Postgraduate Admission

Research NRI / Foreign

VIT Online Education

Others