Events

Hands on ASIC Design using Cadence Tools – Hybrid Mode
27-06-2025

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29-06-2025

"The scheduled program has been postponed to July 2025. The exact dates will be announced as soon as possible (ASAP)."

It is an engaging three-day program designed to Circuit branch participants in the fundamentals of ASIC design and hardware description languages, particularly Verilog. Starting with an introduction to ASIC design flow, the event progresses through key concepts like combinational and sequential circuit design, FSM implementation, and reusable module creation. With hands-on sessions, participants explore practical RTL coding projects. The bootcamp culminates in group projects, presentations, and feedback.

"The scheduled program has been postponed to July 2025. The exact dates will be announced as soon as possible (ASAP)."

Online Seminar on “Gender Equality for Sustainable water Management ”
One day workshop on Data Analytics using Power BI, Process Macro and Recent Trends in Research
An Online Webinar on COMPANY INCORPORATION & REGULATORY/LEGAL COMPLIANCES
One Day International Workshop on Carbon Capture & Sustainability

Undergraduate Admission

Undergraduate NRI / Foreign Admission

Postgraduate Admission

Postgraduate NRI / Foreign Admission

Research

VIT Online Education

Others

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